FFmpeg
vp9dsp_init.c
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1 /*
2  * Copyright (c) 2024 Institue of Software Chinese Academy of Sciences (ISCAS).
3  *
4  * This file is part of FFmpeg.
5  *
6  * FFmpeg is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lervvr General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * FFmpeg is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14  * Lervvr General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lervvr General Public
17  * License along with FFmpeg; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19  */
20 
21 #include "libavutil/attributes.h"
22 #include "libavutil/cpu.h"
23 #include "libavutil/riscv/cpu.h"
24 #include "libavcodec/vp9dsp.h"
25 #include "vp9dsp.h"
26 
27 static av_cold void vp9dsp_mc_init_riscv(VP9DSPContext *dsp, int bpp)
28 {
29 #if HAVE_RV
30  int flags = av_get_cpu_flags();
31 
32 # if __riscv_xlen >= 64
33  if (bpp == 8 && (flags & AV_CPU_FLAG_RV_MISALIGNED)) {
34 
35 #define init_fpel(idx1, sz) \
36  dsp->mc[idx1][FILTER_8TAP_SMOOTH ][0][0][0] = ff_copy##sz##_rvi; \
37  dsp->mc[idx1][FILTER_8TAP_REGULAR][0][0][0] = ff_copy##sz##_rvi; \
38  dsp->mc[idx1][FILTER_8TAP_SHARP ][0][0][0] = ff_copy##sz##_rvi; \
39  dsp->mc[idx1][FILTER_BILINEAR ][0][0][0] = ff_copy##sz##_rvi
40 
41  init_fpel(0, 64);
42  init_fpel(1, 32);
43  init_fpel(2, 16);
44  init_fpel(3, 8);
45  init_fpel(4, 4);
46 
47 #undef init_fpel
48  }
49 # endif
50 
51 #endif
52 }
53 
54 static av_cold void vp9dsp_intrapred_init_riscv(VP9DSPContext *dsp, int bpp)
55 {
56 #if HAVE_RV
57  int flags = av_get_cpu_flags();
58 
59 # if __riscv_xlen >= 64
60  if (bpp == 8 && (flags & AV_CPU_FLAG_RVB_ADDR)) {
61  dsp->intra_pred[TX_32X32][VERT_PRED] = ff_v_32x32_rvi;
62  dsp->intra_pred[TX_16X16][VERT_PRED] = ff_v_16x16_rvi;
63  dsp->intra_pred[TX_8X8][VERT_PRED] = ff_v_8x8_rvi;
64  }
65 # endif
66 #if HAVE_RVV
67  if (bpp == 8 && flags & AV_CPU_FLAG_RVV_I64 && ff_rv_vlen_least(128)) {
68  dsp->intra_pred[TX_8X8][DC_PRED] = ff_dc_8x8_rvv;
69  dsp->intra_pred[TX_8X8][LEFT_DC_PRED] = ff_dc_left_8x8_rvv;
70  dsp->intra_pred[TX_8X8][DC_127_PRED] = ff_dc_127_8x8_rvv;
71  dsp->intra_pred[TX_8X8][DC_128_PRED] = ff_dc_128_8x8_rvv;
72  dsp->intra_pred[TX_8X8][DC_129_PRED] = ff_dc_129_8x8_rvv;
73  dsp->intra_pred[TX_8X8][TOP_DC_PRED] = ff_dc_top_8x8_rvv;
74  }
75 
76  if (bpp == 8 && flags & AV_CPU_FLAG_RVV_I32 && ff_rv_vlen_least(128)) {
77  dsp->intra_pred[TX_32X32][DC_PRED] = ff_dc_32x32_rvv;
78  dsp->intra_pred[TX_16X16][DC_PRED] = ff_dc_16x16_rvv;
79  dsp->intra_pred[TX_32X32][LEFT_DC_PRED] = ff_dc_left_32x32_rvv;
80  dsp->intra_pred[TX_16X16][LEFT_DC_PRED] = ff_dc_left_16x16_rvv;
81  dsp->intra_pred[TX_32X32][DC_127_PRED] = ff_dc_127_32x32_rvv;
82  dsp->intra_pred[TX_16X16][DC_127_PRED] = ff_dc_127_16x16_rvv;
83  dsp->intra_pred[TX_32X32][DC_128_PRED] = ff_dc_128_32x32_rvv;
84  dsp->intra_pred[TX_16X16][DC_128_PRED] = ff_dc_128_16x16_rvv;
85  dsp->intra_pred[TX_32X32][DC_129_PRED] = ff_dc_129_32x32_rvv;
86  dsp->intra_pred[TX_16X16][DC_129_PRED] = ff_dc_129_16x16_rvv;
87  dsp->intra_pred[TX_32X32][TOP_DC_PRED] = ff_dc_top_32x32_rvv;
88  dsp->intra_pred[TX_16X16][TOP_DC_PRED] = ff_dc_top_16x16_rvv;
89  dsp->intra_pred[TX_32X32][HOR_PRED] = ff_h_32x32_rvv;
90  dsp->intra_pred[TX_16X16][HOR_PRED] = ff_h_16x16_rvv;
91  dsp->intra_pred[TX_8X8][HOR_PRED] = ff_h_8x8_rvv;
92  }
93 #endif
94 #endif
95 }
96 
97 av_cold void ff_vp9dsp_init_riscv(VP9DSPContext *dsp, int bpp, int bitexact)
98 {
99  vp9dsp_intrapred_init_riscv(dsp, bpp);
100  vp9dsp_mc_init_riscv(dsp, bpp);
101 }
ff_dc_127_32x32_rvv
void ff_dc_127_32x32_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
ff_h_32x32_rvv
void ff_h_32x32_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
DC_128_PRED
@ DC_128_PRED
Definition: vp9.h:58
ff_dc_8x8_rvv
void ff_dc_8x8_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
ff_dc_left_16x16_rvv
void ff_dc_left_16x16_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
ff_dc_129_16x16_rvv
void ff_dc_129_16x16_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
ff_dc_top_32x32_rvv
void ff_dc_top_32x32_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
vp9dsp_mc_init_riscv
static av_cold void vp9dsp_mc_init_riscv(VP9DSPContext *dsp, int bpp)
Definition: vp9dsp_init.c:27
DC_PRED
@ DC_PRED
Definition: vp9.h:48
VP9DSPContext
Definition: vp9dsp.h:40
vp9dsp_intrapred_init_riscv
static av_cold void vp9dsp_intrapred_init_riscv(VP9DSPContext *dsp, int bpp)
Definition: vp9dsp_init.c:54
ff_v_16x16_rvi
void ff_v_16x16_rvi(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
ff_dc_16x16_rvv
void ff_dc_16x16_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
av_get_cpu_flags
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
Definition: cpu.c:103
DC_127_PRED
@ DC_127_PRED
Definition: vp9.h:59
VERT_PRED
@ VERT_PRED
Definition: vp9.h:46
ff_h_8x8_rvv
void ff_h_8x8_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
ff_v_8x8_rvi
void ff_v_8x8_rvi(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
ff_dc_127_8x8_rvv
void ff_dc_127_8x8_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
HOR_PRED
@ HOR_PRED
Definition: vp9.h:47
av_cold
#define av_cold
Definition: attributes.h:90
ff_dc_129_32x32_rvv
void ff_dc_129_32x32_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
ff_rv_vlen_least
static bool ff_rv_vlen_least(unsigned int bits)
Checks that the vector bit-size is at least the given value.
Definition: cpu.h:51
cpu.h
LEFT_DC_PRED
@ LEFT_DC_PRED
Definition: vp9.h:56
AV_CPU_FLAG_RVB_ADDR
#define AV_CPU_FLAG_RVB_ADDR
Address bit-manipulations.
Definition: cpu.h:92
ff_dc_32x32_rvv
void ff_dc_32x32_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
ff_dc_128_16x16_rvv
void ff_dc_128_16x16_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
ff_dc_top_8x8_rvv
void ff_dc_top_8x8_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
ff_dc_128_8x8_rvv
void ff_dc_128_8x8_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
TX_8X8
@ TX_8X8
Definition: vp9.h:29
TX_16X16
@ TX_16X16
Definition: vp9.h:30
VP9DSPContext::intra_pred
void(* intra_pred[N_TXFM_SIZES][N_INTRA_PRED_MODES])(uint8_t *dst, ptrdiff_t stride, const uint8_t *left, const uint8_t *top)
Definition: vp9dsp.h:52
init_fpel
#define init_fpel(idx1, idx2, sz, type, suffix)
vp9dsp.h
ff_h_16x16_rvv
void ff_h_16x16_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
cpu.h
ff_dc_129_8x8_rvv
void ff_dc_129_8x8_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
ff_dc_left_32x32_rvv
void ff_dc_left_32x32_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
attributes.h
AV_CPU_FLAG_RV_MISALIGNED
#define AV_CPU_FLAG_RV_MISALIGNED
Fast misaligned accesses.
Definition: cpu.h:94
DC_129_PRED
@ DC_129_PRED
Definition: vp9.h:60
ff_dc_127_16x16_rvv
void ff_dc_127_16x16_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
AV_CPU_FLAG_RVV_I32
#define AV_CPU_FLAG_RVV_I32
Vectors of 8/16/32-bit int's *‍/.
Definition: cpu.h:87
vp9dsp.h
ff_dc_top_16x16_rvv
void ff_dc_top_16x16_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
ff_v_32x32_rvi
void ff_v_32x32_rvi(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
ff_dc_left_8x8_rvv
void ff_dc_left_8x8_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
ff_vp9dsp_init_riscv
av_cold void ff_vp9dsp_init_riscv(VP9DSPContext *dsp, int bpp, int bitexact)
Definition: vp9dsp_init.c:97
TX_32X32
@ TX_32X32
Definition: vp9.h:31
TOP_DC_PRED
@ TOP_DC_PRED
Definition: vp9.h:57
flags
#define flags(name, subs,...)
Definition: cbs_av1.c:474
AV_CPU_FLAG_RVV_I64
#define AV_CPU_FLAG_RVV_I64
Vectors of 64-bit int's *‍/.
Definition: cpu.h:89
ff_dc_128_32x32_rvv
void ff_dc_128_32x32_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)
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