FFmpeg
constants.c
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1 /*
2  * MMX/SSE/AVX constants used across x86 dsp optimizations.
3  *
4  * This file is part of FFmpeg.
5  *
6  * FFmpeg is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * FFmpeg is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with FFmpeg; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19  */
20 
21 #include "libavutil/mem_internal.h"
22 #include "libavutil/x86/asm.h" // for xmm_reg
23 #include "constants.h"
24 
25 DECLARE_ALIGNED(32, const ymm_reg, ff_pw_1) = { 0x0001000100010001ULL, 0x0001000100010001ULL,
26  0x0001000100010001ULL, 0x0001000100010001ULL };
27 DECLARE_ALIGNED(32, const ymm_reg, ff_pw_2) = { 0x0002000200020002ULL, 0x0002000200020002ULL,
28  0x0002000200020002ULL, 0x0002000200020002ULL };
29 DECLARE_ASM_ALIGNED(16, const xmm_reg, ff_pw_3) = { 0x0003000300030003ULL, 0x0003000300030003ULL };
30 DECLARE_ASM_ALIGNED(32, const ymm_reg, ff_pw_4) = { 0x0004000400040004ULL, 0x0004000400040004ULL,
31  0x0004000400040004ULL, 0x0004000400040004ULL };
32 DECLARE_ASM_ALIGNED(16, const xmm_reg, ff_pw_5) = { 0x0005000500050005ULL, 0x0005000500050005ULL };
33 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_8) = { 0x0008000800080008ULL, 0x0008000800080008ULL };
34 DECLARE_ASM_ALIGNED(16, const xmm_reg, ff_pw_9) = { 0x0009000900090009ULL, 0x0009000900090009ULL };
35 DECLARE_ALIGNED(8, const uint64_t, ff_pw_15) = 0x000F000F000F000FULL;
36 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_16) = { 0x0010001000100010ULL, 0x0010001000100010ULL };
37 DECLARE_ASM_ALIGNED(16, const xmm_reg, ff_pw_18) = { 0x0012001200120012ULL, 0x0012001200120012ULL };
38 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_20) = { 0x0014001400140014ULL, 0x0014001400140014ULL };
39 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_32) = { 0x0020002000200020ULL, 0x0020002000200020ULL };
40 DECLARE_ASM_ALIGNED(8, const uint64_t, ff_pw_42) = 0x002A002A002A002AULL;
41 DECLARE_ASM_ALIGNED(8, const uint64_t, ff_pw_53) = 0x0035003500350035ULL;
42 DECLARE_ASM_ALIGNED(16, const xmm_reg, ff_pw_64) = { 0x0040004000400040ULL, 0x0040004000400040ULL };
43 DECLARE_ASM_ALIGNED(8, const uint64_t, ff_pw_96) = 0x0060006000600060ULL;
44 DECLARE_ASM_ALIGNED(8, const uint64_t, ff_pw_128) = 0x0080008000800080ULL;
45 DECLARE_ALIGNED(32, const ymm_reg, ff_pw_255) = { 0x00ff00ff00ff00ffULL, 0x00ff00ff00ff00ffULL,
46  0x00ff00ff00ff00ffULL, 0x00ff00ff00ff00ffULL };
47 DECLARE_ALIGNED(32, const ymm_reg, ff_pw_256) = { 0x0100010001000100ULL, 0x0100010001000100ULL,
48  0x0100010001000100ULL, 0x0100010001000100ULL };
49 DECLARE_ALIGNED(32, const ymm_reg, ff_pw_512) = { 0x0200020002000200ULL, 0x0200020002000200ULL,
50  0x0200020002000200ULL, 0x0200020002000200ULL };
51 DECLARE_ALIGNED(16, const xmm_reg, ff_pw_1019) = { 0x03FB03FB03FB03FBULL, 0x03FB03FB03FB03FBULL };
52 DECLARE_ALIGNED(32, const ymm_reg, ff_pw_1023) = { 0x03ff03ff03ff03ffULL, 0x03ff03ff03ff03ffULL,
53  0x03ff03ff03ff03ffULL, 0x03ff03ff03ff03ffULL};
54 DECLARE_ALIGNED(32, const ymm_reg, ff_pw_1024) = { 0x0400040004000400ULL, 0x0400040004000400ULL,
55  0x0400040004000400ULL, 0x0400040004000400ULL};
56 DECLARE_ALIGNED(32, const ymm_reg, ff_pw_2048) = { 0x0800080008000800ULL, 0x0800080008000800ULL,
57  0x0800080008000800ULL, 0x0800080008000800ULL };
58 DECLARE_ALIGNED(32, const ymm_reg, ff_pw_4095) = { 0x0fff0fff0fff0fffULL, 0x0fff0fff0fff0fffULL,
59  0x0fff0fff0fff0fffULL, 0x0fff0fff0fff0fffULL };
60 DECLARE_ALIGNED(32, const ymm_reg, ff_pw_4096) = { 0x1000100010001000ULL, 0x1000100010001000ULL,
61  0x1000100010001000ULL, 0x1000100010001000ULL };
62 DECLARE_ALIGNED(32, const ymm_reg, ff_pw_8192) = { 0x2000200020002000ULL, 0x2000200020002000ULL,
63  0x2000200020002000ULL, 0x2000200020002000ULL };
64 DECLARE_ALIGNED(32, const ymm_reg, ff_pw_m1) = { 0xFFFFFFFFFFFFFFFFULL, 0xFFFFFFFFFFFFFFFFULL,
65  0xFFFFFFFFFFFFFFFFULL, 0xFFFFFFFFFFFFFFFFULL };
66 
67 DECLARE_ALIGNED(32, const ymm_reg, ff_pb_0) = { 0x0000000000000000ULL, 0x0000000000000000ULL,
68  0x0000000000000000ULL, 0x0000000000000000ULL };
69 DECLARE_ALIGNED(32, const ymm_reg, ff_pb_1) = { 0x0101010101010101ULL, 0x0101010101010101ULL,
70  0x0101010101010101ULL, 0x0101010101010101ULL };
71 DECLARE_ALIGNED(32, const ymm_reg, ff_pb_2) = { 0x0202020202020202ULL, 0x0202020202020202ULL,
72  0x0202020202020202ULL, 0x0202020202020202ULL };
73 DECLARE_ALIGNED(32, const ymm_reg, ff_pb_3) = { 0x0303030303030303ULL, 0x0303030303030303ULL,
74  0x0303030303030303ULL, 0x0303030303030303ULL };
75 DECLARE_ALIGNED(32, const xmm_reg, ff_pb_15) = { 0x0F0F0F0F0F0F0F0FULL, 0x0F0F0F0F0F0F0F0FULL };
76 DECLARE_ALIGNED(32, const ymm_reg, ff_pb_80) = { 0x8080808080808080ULL, 0x8080808080808080ULL,
77  0x8080808080808080ULL, 0x8080808080808080ULL };
78 DECLARE_ALIGNED(32, const ymm_reg, ff_pb_FE) = { 0xFEFEFEFEFEFEFEFEULL, 0xFEFEFEFEFEFEFEFEULL,
79  0xFEFEFEFEFEFEFEFEULL, 0xFEFEFEFEFEFEFEFEULL };
80 DECLARE_ALIGNED(8, const uint64_t, ff_pb_FC) = 0xFCFCFCFCFCFCFCFCULL;
81 
82 DECLARE_ALIGNED(16, const xmm_reg, ff_ps_neg) = { 0x8000000080000000ULL, 0x8000000080000000ULL };
83 
84 DECLARE_ALIGNED(32, const ymm_reg, ff_pd_1) = { 0x0000000100000001ULL, 0x0000000100000001ULL,
85  0x0000000100000001ULL, 0x0000000100000001ULL };
86 DECLARE_ALIGNED(32, const ymm_reg, ff_pd_16) = { 0x0000001000000010ULL, 0x0000001000000010ULL,
87  0x0000001000000010ULL, 0x0000001000000010ULL };
88 DECLARE_ALIGNED(32, const ymm_reg, ff_pd_32) = { 0x0000002000000020ULL, 0x0000002000000020ULL,
89  0x0000002000000020ULL, 0x0000002000000020ULL };
90 DECLARE_ALIGNED(32, const ymm_reg, ff_pd_8192) = { 0x0000200000002000ULL, 0x0000200000002000ULL,
91  0x0000200000002000ULL, 0x0000200000002000ULL };
92 DECLARE_ALIGNED(32, const ymm_reg, ff_pd_65535)= { 0x0000ffff0000ffffULL, 0x0000ffff0000ffffULL,
93  0x0000ffff0000ffffULL, 0x0000ffff0000ffffULL };
ff_pb_0
const ymm_reg ff_pb_0
Definition: constants.c:67
ff_pw_64
const uint64_t ff_pw_64
Definition: constants.c:45
ff_pw_42
const uint64_t ff_pw_42
ff_pw_2
const uint64_t ff_pw_2
Definition: constants.c:27
mem_internal.h
ff_pw_8
const uint64_t ff_pw_8
Definition: constants.c:32
ff_pw_4
const uint64_t ff_pw_4
Definition: constants.c:29
ff_pb_3
const uint64_t ff_pb_3
Definition: constants.c:58
ff_pw_8192
const ymm_reg ff_pw_8192
Definition: constants.c:62
ff_pw_20
const uint64_t ff_pw_20
Definition: constants.c:40
ff_pw_128
const uint64_t ff_pw_128
Definition: constants.c:46
ff_pw_512
const uint64_t ff_pw_512
Definition: constants.c:47
ff_pw_256
const ymm_reg ff_pw_256
Definition: constants.c:47
ff_pw_255
const ymm_reg ff_pw_255
Definition: constants.c:45
DECLARE_ASM_ALIGNED
DECLARE_ASM_ALIGNED(16, const xmm_reg, ff_pw_3)
ff_pw_3
const uint64_t ff_pw_3
Definition: constants.c:28
ff_pw_1023
const ymm_reg ff_pw_1023
Definition: constants.c:52
ff_pd_32
const ymm_reg ff_pd_32
Definition: constants.c:88
ff_pw_4095
const ymm_reg ff_pw_4095
Definition: constants.c:58
ff_pb_FE
const uint64_t ff_pb_FE
Definition: constants.c:61
ff_pw_1024
const ymm_reg ff_pw_1024
Definition: constants.c:54
ff_pw_96
const uint64_t ff_pw_96
ff_pw_16
const uint64_t ff_pw_16
Definition: constants.c:37
ff_pd_16
const ymm_reg ff_pd_16
Definition: constants.c:86
ymm_reg
Definition: asm.h:28
ff_pw_4096
const ymm_reg ff_pw_4096
Definition: constants.c:60
ff_pw_5
const uint64_t ff_pw_5
Definition: constants.c:30
ff_pw_32
const uint64_t ff_pw_32
Definition: constants.c:43
ff_pd_1
const ymm_reg ff_pd_1
Definition: constants.c:84
ff_ps_neg
const xmm_reg ff_ps_neg
Definition: constants.c:82
ff_pw_18
const uint64_t ff_pw_18
Definition: constants.c:39
ff_pw_53
const uint64_t ff_pw_53
Definition: constants.c:44
ff_pw_1019
const xmm_reg ff_pw_1019
Definition: constants.c:51
ff_pw_m1
const ymm_reg ff_pw_m1
Definition: constants.c:64
constants.h
ff_pw_1
const uint64_t ff_pw_1
Definition: constants.c:26
asm.h
DECLARE_ALIGNED
#define DECLARE_ALIGNED(n, t, v)
Definition: mem.h:117
ff_pb_15
const xmm_reg ff_pb_15
Definition: constants.c:75
ff_pb_80
const uint64_t ff_pb_80
Definition: constants.c:59
ff_pb_FC
const uint64_t ff_pb_FC
Definition: constants.c:80
ff_pw_15
const uint64_t ff_pw_15
Definition: constants.c:36
ff_pd_65535
const ymm_reg ff_pd_65535
Definition: constants.c:92
ff_pb_1
const uint64_t ff_pb_1
Definition: constants.c:57
ff_pb_2
const ymm_reg ff_pb_2
Definition: constants.c:71
ff_pd_8192
const ymm_reg ff_pd_8192
Definition: constants.c:90
xmm_reg
Definition: asm.h:27
ff_pw_2048
const ymm_reg ff_pw_2048
Definition: constants.c:56
ff_pw_9
const uint64_t ff_pw_9
Definition: constants.c:33
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