|
| #define | OPN rasm_op_none() |
| |
| #define | IMM(val) rasm_op_imm(val) |
| |
| #define | AARCH64_COND_EQ 0x0 |
| |
| #define | AARCH64_COND_NE 0x1 |
| |
| #define | AARCH64_COND_HS 0x2 |
| |
| #define | AARCH64_COND_CS AARCH64_COND_HS |
| |
| #define | AARCH64_COND_LO 0x3 |
| |
| #define | AARCH64_COND_CC AARCH64_COND_LO |
| |
| #define | AARCH64_COND_MI 0x4 |
| |
| #define | AARCH64_COND_PL 0x5 |
| |
| #define | AARCH64_COND_VS 0x6 |
| |
| #define | AARCH64_COND_VC 0x7 |
| |
| #define | AARCH64_COND_HI 0x8 |
| |
| #define | AARCH64_COND_LS 0x9 |
| |
| #define | AARCH64_COND_GE 0xa |
| |
| #define | AARCH64_COND_LT 0xb |
| |
| #define | AARCH64_COND_GT 0xc |
| |
| #define | AARCH64_COND_LE 0xd |
| |
| #define | AARCH64_COND_AL 0xe |
| |
| #define | AARCH64_COND_NV 0xf |
| |
| #define | AARCH64_BASE_OFFSET 0 |
| |
| #define | AARCH64_BASE_PRE 1 |
| |
| #define | AARCH64_BASE_POST 2 |
| |
| #define | i_none(rctx) rasm_add_insn(rctx, AARCH64_INSN_NONE, OPN, OPN, OPN, OPN) |
| |
| #define | i_add(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_ADD, op0, op1, op2, OPN) |
| |
| #define | i_addv(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_ADDV, op0, op1, OPN, OPN) |
| |
| #define | i_adr(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_ADR, op0, op1, OPN, OPN) |
| |
| #define | i_and(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_AND, op0, op1, op2, OPN) |
| |
| #define | i_b(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_B, op0, op1, OPN, OPN) |
| |
| #define | i_br(rctx, op0) rasm_add_insn(rctx, AARCH64_INSN_BR, op0, OPN, OPN, OPN) |
| |
| #define | i_cmp(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_CMP, op0, op1, OPN, OPN) |
| |
| #define | i_csel(rctx, op0, op1, op2, op3) rasm_add_insn(rctx, AARCH64_INSN_CSEL, op0, op1, op2, op3) |
| |
| #define | i_dup(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_DUP, op0, op1, OPN, OPN) |
| |
| #define | i_fadd(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_FADD, op0, op1, op2, OPN) |
| |
| #define | i_fcvtzu(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_FCVTZU, op0, op1, OPN, OPN) |
| |
| #define | i_fmax(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_FMAX, op0, op1, op2, OPN) |
| |
| #define | i_fmin(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_FMIN, op0, op1, op2, OPN) |
| |
| #define | i_fmla(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_FMLA, op0, op1, op2, OPN) |
| |
| #define | i_fmul(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_FMUL, op0, op1, op2, OPN) |
| |
| #define | i_ins(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_INS, op0, op1, OPN, OPN) |
| |
| #define | i_ld1(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_LD1, op0, op1, OPN, OPN) |
| |
| #define | i_ld1r(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_LD1R, op0, op1, OPN, OPN) |
| |
| #define | i_ld2(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_LD2, op0, op1, OPN, OPN) |
| |
| #define | i_ld3(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_LD3, op0, op1, OPN, OPN) |
| |
| #define | i_ld4(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_LD4, op0, op1, OPN, OPN) |
| |
| #define | i_ldp(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_LDP, op0, op1, op2, OPN) |
| |
| #define | i_ldr(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_LDR, op0, op1, OPN, OPN) |
| |
| #define | i_ldrb(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_LDRB, op0, op1, OPN, OPN) |
| |
| #define | i_ldrh(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_LDRH, op0, op1, OPN, OPN) |
| |
| #define | i_lsr(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_LSR, op0, op1, op2, OPN) |
| |
| #define | i_mov(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_MOV, op0, op1, OPN, OPN) |
| |
| #define | i_movi(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_MOVI, op0, op1, OPN, OPN) |
| |
| #define | i_mul(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_MUL, op0, op1, op2, OPN) |
| |
| #define | i_orr(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_ORR, op0, op1, op2, OPN) |
| |
| #define | i_ret(rctx) rasm_add_insn(rctx, AARCH64_INSN_RET, OPN, OPN, OPN, OPN) |
| |
| #define | i_rev16(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_REV16, op0, op1, OPN, OPN) |
| |
| #define | i_rev32(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_REV32, op0, op1, OPN, OPN) |
| |
| #define | i_shl(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_SHL, op0, op1, op2, OPN) |
| |
| #define | i_st1(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_ST1, op0, op1, OPN, OPN) |
| |
| #define | i_st2(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_ST2, op0, op1, OPN, OPN) |
| |
| #define | i_st3(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_ST3, op0, op1, OPN, OPN) |
| |
| #define | i_st4(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_ST4, op0, op1, OPN, OPN) |
| |
| #define | i_stp(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_STP, op0, op1, op2, OPN) |
| |
| #define | i_str(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_STR, op0, op1, OPN, OPN) |
| |
| #define | i_sub(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_SUB, op0, op1, op2, OPN) |
| |
| #define | i_subs(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_SUBS, op0, op1, op2, OPN) |
| |
| #define | i_tbl(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_TBL, op0, op1, op2, OPN) |
| |
| #define | i_ubfiz(rctx, op0, op1, op2, op3) rasm_add_insn(rctx, AARCH64_INSN_UBFIZ, op0, op1, op2, op3) |
| |
| #define | i_ucvtf(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_UCVTF, op0, op1, OPN, OPN) |
| |
| #define | i_umax(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_UMAX, op0, op1, op2, OPN) |
| |
| #define | i_umin(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_UMIN, op0, op1, op2, OPN) |
| |
| #define | i_uqxtn(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_UQXTN, op0, op1, OPN, OPN) |
| |
| #define | i_ushl(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_USHL, op0, op1, op2, OPN) |
| |
| #define | i_ushll(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_USHLL, op0, op1, op2, OPN) |
| |
| #define | i_ushll2(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_USHLL2, op0, op1, op2, OPN) |
| |
| #define | i_ushr(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_USHR, op0, op1, op2, OPN) |
| |
| #define | i_uxtl(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_UXTL, op0, op1, OPN, OPN) |
| |
| #define | i_uxtl2(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_UXTL2, op0, op1, OPN, OPN) |
| |
| #define | i_xtn(rctx, op0, op1) rasm_add_insn(rctx, AARCH64_INSN_XTN, op0, op1, OPN, OPN) |
| |
| #define | i_zip1(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_ZIP1, op0, op1, op2, OPN) |
| |
| #define | i_zip2(rctx, op0, op1, op2) rasm_add_insn(rctx, AARCH64_INSN_ZIP2, op0, op1, op2, OPN) |
| |
| #define | i_beq(rctx, id) i_b(rctx, a64cond_eq(), rasm_op_label(id)) |
| |
| #define | i_bne(rctx, id) i_b(rctx, a64cond_ne(), rasm_op_label(id)) |
| |
| #define | i_bhs(rctx, id) i_b(rctx, a64cond_hs(), rasm_op_label(id)) |
| |
| #define | i_bcs(rctx, id) i_b(rctx, a64cond_cs(), rasm_op_label(id)) |
| |
| #define | i_blo(rctx, id) i_b(rctx, a64cond_lo(), rasm_op_label(id)) |
| |
| #define | i_bcc(rctx, id) i_b(rctx, a64cond_cc(), rasm_op_label(id)) |
| |
| #define | i_bmi(rctx, id) i_b(rctx, a64cond_mi(), rasm_op_label(id)) |
| |
| #define | i_bpl(rctx, id) i_b(rctx, a64cond_pl(), rasm_op_label(id)) |
| |
| #define | i_bvs(rctx, id) i_b(rctx, a64cond_vs(), rasm_op_label(id)) |
| |
| #define | i_bvc(rctx, id) i_b(rctx, a64cond_vc(), rasm_op_label(id)) |
| |
| #define | i_bhi(rctx, id) i_b(rctx, a64cond_hi(), rasm_op_label(id)) |
| |
| #define | i_bls(rctx, id) i_b(rctx, a64cond_ls(), rasm_op_label(id)) |
| |
| #define | i_bge(rctx, id) i_b(rctx, a64cond_ge(), rasm_op_label(id)) |
| |
| #define | i_blt(rctx, id) i_b(rctx, a64cond_lt(), rasm_op_label(id)) |
| |
| #define | i_bgt(rctx, id) i_b(rctx, a64cond_gt(), rasm_op_label(id)) |
| |
| #define | i_ble(rctx, id) i_b(rctx, a64cond_le(), rasm_op_label(id)) |
| |
| #define | i_mov16b(rctx, op0, op1) i_mov(rctx, v_16b(op0), v_16b(op1)) |
| |
|
| static RasmOp | rasm_op_new (int type) |
| |
| static uint8_t | rasm_op_type (RasmOp op) |
| |
| static RasmOp | rasm_op_none (void) |
| |
| static RasmOp | rasm_op_imm (int32_t val) |
| |
| static int32_t | rasm_op_imm_val (RasmOp op) |
| |
| static RasmOp | rasm_op_label (int id) |
| |
| static int | rasm_op_label_id (RasmOp op) |
| |
| RasmContext * | rasm_alloc (void) |
| |
| void | rasm_free (RasmContext **prctx) |
| |
| RasmNode * | rasm_add_insn (RasmContext *rctx, int id, RasmOp op0, RasmOp op1, RasmOp op2, RasmOp op3) |
| |
| RasmNode * | rasm_add_comment (RasmContext *rctx, const char *comment) |
| |
| RasmNode * | rasm_add_commentf (RasmContext *rctx, char *s, size_t n, const char *fmt,...) av_printf_format(4 |
| |
| RasmNode RasmNode * | rasm_add_label (RasmContext *rctx, int id) |
| |
| RasmNode * | rasm_add_func (RasmContext *rctx, int id, bool export, bool jumpable) |
| |
| RasmNode * | rasm_add_endfunc (RasmContext *rctx) |
| |
| RasmNode * | rasm_add_directive (RasmContext *rctx, const char *text) |
| |
| RasmNode * | rasm_get_current_node (RasmContext *rctx) |
| |
| RasmNode * | rasm_set_current_node (RasmContext *rctx, RasmNode *node) |
| |
| int | rasm_func_begin (RasmContext *rctx, const char *name, bool export, bool jumpable) |
| |
| int | rasm_new_label (RasmContext *rctx, const char *name) |
| | Allocate a new label ID with the given name. More...
|
| |
| int | rasm_new_labelf (RasmContext *rctx, char *s, size_t n, const char *fmt,...) av_printf_format(4 |
| |
| int void | rasm_annotate (RasmContext *rctx, const char *comment) |
| |
| void | rasm_annotatef (RasmContext *rctx, char *s, size_t n, const char *fmt,...) av_printf_format(4 |
| |
| void void | rasm_annotate_next (RasmContext *rctx, const char *comment) |
| |
| void | rasm_annotate_nextf (RasmContext *rctx, char *s, size_t n, const char *fmt,...) av_printf_format(4 |
| |
| void int | rasm_print (RasmContext *rctx, FILE *fp) |
| |
| static RasmOp | a64op_make_gpr (uint8_t n, uint8_t size) |
| |
| static uint8_t | a64op_gpr_n (RasmOp op) |
| |
| static uint8_t | a64op_gpr_size (RasmOp op) |
| |
| static RasmOp | a64op_gpw (uint8_t n) |
| |
| static RasmOp | a64op_gpx (uint8_t n) |
| |
| static RasmOp | a64op_sp (void) |
| |
| static RasmOp | a64op_w (RasmOp op) |
| |
| static RasmOp | a64op_x (RasmOp op) |
| |
| static RasmOp | a64op_make_vec (uint8_t n, uint8_t el_count, uint8_t el_size) |
| |
| static uint8_t | a64op_vec_n (RasmOp op) |
| |
| static uint8_t | a64op_vec_el_count (RasmOp op) |
| |
| static uint8_t | a64op_vec_el_size (RasmOp op) |
| |
| static uint8_t | a64op_vec_num_regs (RasmOp op) |
| |
| static uint8_t | a64op_vec_idx_p1 (RasmOp op) |
| |
| static RasmOp | a64op_vec (uint8_t n) |
| |
| static RasmOp | a64op_vecb (uint8_t n) |
| |
| static RasmOp | a64op_vech (uint8_t n) |
| |
| static RasmOp | a64op_vecs (uint8_t n) |
| |
| static RasmOp | a64op_vecd (uint8_t n) |
| |
| static RasmOp | a64op_vecq (uint8_t n) |
| |
| static RasmOp | a64op_vec8b (uint8_t n) |
| |
| static RasmOp | a64op_vec16b (uint8_t n) |
| |
| static RasmOp | a64op_vec4h (uint8_t n) |
| |
| static RasmOp | a64op_vec8h (uint8_t n) |
| |
| static RasmOp | a64op_vec2s (uint8_t n) |
| |
| static RasmOp | a64op_vec4s (uint8_t n) |
| |
| static RasmOp | a64op_vec2d (uint8_t n) |
| |
| static RasmOp | a64op_veclist (RasmOp op0, RasmOp op1, RasmOp op2, RasmOp op3) |
| | Create register-list operand for structured load/store instructions. More...
|
| |
| static RasmOp | a64op_elem (RasmOp op, uint8_t idx) |
| |
| static RasmOp | v_b (RasmOp op) |
| |
| static RasmOp | v_h (RasmOp op) |
| |
| static RasmOp | v_s (RasmOp op) |
| |
| static RasmOp | v_d (RasmOp op) |
| |
| static RasmOp | v_q (RasmOp op) |
| |
| static RasmOp | v_8b (RasmOp op) |
| |
| static RasmOp | v_16b (RasmOp op) |
| |
| static RasmOp | v_4h (RasmOp op) |
| |
| static RasmOp | v_8h (RasmOp op) |
| |
| static RasmOp | v_2s (RasmOp op) |
| |
| static RasmOp | v_4s (RasmOp op) |
| |
| static RasmOp | v_2d (RasmOp op) |
| |
| static RasmOp | vv_1 (RasmOp op0) |
| |
| static RasmOp | vv_2 (RasmOp op0, RasmOp op1) |
| |
| static RasmOp | vv_3 (RasmOp op0, RasmOp op1, RasmOp op2) |
| |
| static RasmOp | vv_4 (RasmOp op0, RasmOp op1, RasmOp op2, RasmOp op3) |
| |
| void | a64op_vec_views (RasmOp op, AArch64VecViews *out) |
| |
| static RasmOp | a64op_make_base (uint8_t n, uint8_t mode, int16_t imm) |
| |
| static int16_t | a64op_base_imm (RasmOp op) |
| |
| static uint8_t | a64op_base_n (RasmOp op) |
| |
| static uint8_t | a64op_base_mode (RasmOp op) |
| |
| static RasmOp | a64op_base (RasmOp op) |
| |
| static RasmOp | a64op_off (RasmOp op, int16_t imm) |
| |
| static RasmOp | a64op_pre (RasmOp op, int16_t imm) |
| |
| static RasmOp | a64op_post (RasmOp op, int16_t imm) |
| |
| static RasmOp | a64op_cond (int cond) |
| |
| static uint8_t | a64op_cond_val (RasmOp op) |
| |
| static RasmOp | a64cond_eq (void) |
| |
| static RasmOp | a64cond_ne (void) |
| |
| static RasmOp | a64cond_hs (void) |
| |
| static RasmOp | a64cond_cs (void) |
| |
| static RasmOp | a64cond_lo (void) |
| |
| static RasmOp | a64cond_cc (void) |
| |
| static RasmOp | a64cond_mi (void) |
| |
| static RasmOp | a64cond_pl (void) |
| |
| static RasmOp | a64cond_vs (void) |
| |
| static RasmOp | a64cond_vc (void) |
| |
| static RasmOp | a64cond_hi (void) |
| |
| static RasmOp | a64cond_ls (void) |
| |
| static RasmOp | a64cond_ge (void) |
| |
| static RasmOp | a64cond_lt (void) |
| |
| static RasmOp | a64cond_gt (void) |
| |
| static RasmOp | a64cond_le (void) |
| |
| static RasmOp | a64cond_al (void) |
| |
| static RasmOp | a64cond_nv (void) |
| |