FFmpeg
cpu.c
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1 /*
2  * This file is part of FFmpeg.
3  *
4  * FFmpeg is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU Lesser General Public
6  * License as published by the Free Software Foundation; either
7  * version 2.1 of the License, or (at your option) any later version.
8  *
9  * FFmpeg is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * Lesser General Public License for more details.
13  *
14  * You should have received a copy of the GNU Lesser General Public
15  * License along with FFmpeg; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
17  */
18 
19 #include <stdio.h>
20 
21 #include "config.h"
22 
23 #include "libavutil/cpu.h"
24 #include "libavutil/avstring.h"
25 
26 #if ARCH_AARCH64
27 #include "libavutil/aarch64/cpu.h"
28 #elif ARCH_RISCV
29 #include "libavutil/riscv/cpu.h"
30 #endif
31 
32 #if HAVE_UNISTD_H
33 #include <unistd.h>
34 #endif
35 #if !HAVE_GETOPT
36 #include "compat/getopt.c"
37 #endif
38 
39 static const struct {
40  int flag;
41  const char *name;
42 } cpu_flag_tab[] = {
43 #if ARCH_AARCH64
44  { AV_CPU_FLAG_ARMV8, "armv8" },
45  { AV_CPU_FLAG_NEON, "neon" },
46  { AV_CPU_FLAG_VFP, "vfp" },
47  { AV_CPU_FLAG_DOTPROD, "dotprod" },
48  { AV_CPU_FLAG_I8MM, "i8mm" },
49  { AV_CPU_FLAG_SVE, "sve" },
50  { AV_CPU_FLAG_SVE2, "sve2" },
51  { AV_CPU_FLAG_SME, "sme" },
52  { AV_CPU_FLAG_ARM_CRC, "crc" },
53 #elif ARCH_ARM
54  { AV_CPU_FLAG_ARMV5TE, "armv5te" },
55  { AV_CPU_FLAG_ARMV6, "armv6" },
56  { AV_CPU_FLAG_ARMV6T2, "armv6t2" },
57  { AV_CPU_FLAG_VFP, "vfp" },
58  { AV_CPU_FLAG_VFP_VM, "vfp_vm" },
59  { AV_CPU_FLAG_VFPV3, "vfpv3" },
60  { AV_CPU_FLAG_NEON, "neon" },
61  { AV_CPU_FLAG_SETEND, "setend" },
62 #elif ARCH_PPC
63  { AV_CPU_FLAG_ALTIVEC, "altivec" },
64  { AV_CPU_FLAG_VSX, "vsx" },
65  { AV_CPU_FLAG_POWER8, "power8" },
66 #elif ARCH_MIPS
67  { AV_CPU_FLAG_MMI, "mmi" },
68  { AV_CPU_FLAG_MSA, "msa" },
69 #elif ARCH_X86
70  { AV_CPU_FLAG_MMX, "mmx" },
71  { AV_CPU_FLAG_MMXEXT, "mmxext" },
72  { AV_CPU_FLAG_SSE, "sse" },
73  { AV_CPU_FLAG_SSE2, "sse2" },
74  { AV_CPU_FLAG_SSE2SLOW, "sse2slow" },
75  { AV_CPU_FLAG_SSE3, "sse3" },
76  { AV_CPU_FLAG_SSE3SLOW, "sse3slow" },
77  { AV_CPU_FLAG_SSSE3, "ssse3" },
78  { AV_CPU_FLAG_ATOM, "atom" },
79  { AV_CPU_FLAG_SSE4, "sse4.1" },
80  { AV_CPU_FLAG_SSE42, "sse4.2" },
81  { AV_CPU_FLAG_AVX, "avx" },
82  { AV_CPU_FLAG_AVXSLOW, "avxslow" },
83  { AV_CPU_FLAG_XOP, "xop" },
84  { AV_CPU_FLAG_FMA3, "fma3" },
85  { AV_CPU_FLAG_FMA4, "fma4" },
86  { AV_CPU_FLAG_3DNOW, "3dnow" },
87  { AV_CPU_FLAG_3DNOWEXT, "3dnowext" },
88  { AV_CPU_FLAG_CMOV, "cmov" },
89  { AV_CPU_FLAG_AVX2, "avx2" },
90  { AV_CPU_FLAG_BMI1, "bmi1" },
91  { AV_CPU_FLAG_BMI2, "bmi2" },
92  { AV_CPU_FLAG_AESNI, "aesni" },
93  { AV_CPU_FLAG_CLMUL, "clmul" },
94  { AV_CPU_FLAG_AVX512, "avx512" },
95  { AV_CPU_FLAG_AVX512ICL, "avx512icl" },
96  { AV_CPU_FLAG_SLOW_GATHER, "slowgather" },
97 #elif ARCH_LOONGARCH
98  { AV_CPU_FLAG_LSX, "lsx" },
99  { AV_CPU_FLAG_LASX, "lasx" },
100 #elif ARCH_RISCV
101  { AV_CPU_FLAG_RVI, "rvi" },
102  { AV_CPU_FLAG_RVB_BASIC, "zbb" },
103  { AV_CPU_FLAG_RVB, "rvb" },
104  { AV_CPU_FLAG_RVV_I32, "zve32x" },
105  { AV_CPU_FLAG_RVV_F32, "zve32f" },
106  { AV_CPU_FLAG_RVV_I64, "zve64x" },
107  { AV_CPU_FLAG_RVV_F64, "zve64d" },
108  { AV_CPU_FLAG_RV_ZVBB, "zvbb" },
109  { AV_CPU_FLAG_RV_MISALIGNED, "misaligned" },
110 #elif ARCH_WASM
111  { AV_CPU_FLAG_SIMD128, "simd128" },
112 #endif
113  { 0 }
114 };
115 
116 static void print_cpu_flags(int cpu_flags, const char *type)
117 {
118  int i;
119 
120  printf("cpu_flags(%s) = 0x%08X\n", type, cpu_flags);
121  printf("cpu_flags_str(%s) =", type);
122  for (i = 0; cpu_flag_tab[i].flag; i++)
123  if (cpu_flags & cpu_flag_tab[i].flag)
124  printf(" %s", cpu_flag_tab[i].name);
125  printf("\n");
126 }
127 
128 
129 int main(int argc, char **argv)
130 {
131  int cpu_flags_raw = av_get_cpu_flags();
132  int cpu_flags_eff;
133  int cpu_count = av_cpu_count();
134  const char *threads = "auto";
135  int i;
136 
137  for(i = 0; cpu_flag_tab[i].flag; i++) {
138  unsigned tmp = 0;
139  if (av_parse_cpu_caps(&tmp, cpu_flag_tab[i].name) < 0) {
140  fprintf(stderr, "Table missing %s\n", cpu_flag_tab[i].name);
141  return 4;
142  }
143  }
144 
145  if (cpu_flags_raw < 0)
146  return 1;
147 
148  for (;;) {
149  int c = getopt(argc, argv, "c:t:");
150  if (c == -1)
151  break;
152  switch (c) {
153  case 'c':
154  {
155  unsigned flags = av_get_cpu_flags();
156  if (av_parse_cpu_caps(&flags, optarg) < 0)
157  return 2;
158 
160  break;
161  }
162  case 't':
163  {
164  threads = optarg;
165  }
166  }
167  }
168 
169  cpu_flags_eff = av_get_cpu_flags();
170 
171  if (cpu_flags_eff < 0)
172  return 3;
173 
174  print_cpu_flags(cpu_flags_raw, "raw");
175  print_cpu_flags(cpu_flags_eff, "effective");
176  printf("threads = %s (cpu_count = %d)\n", threads, cpu_count);
177 #if ARCH_AARCH64 && HAVE_SVE
178  if (cpu_flags_raw & AV_CPU_FLAG_SVE)
179  printf("sve_vector_length = %d\n", 8 * ff_aarch64_sve_length());
180 #endif
181 #if ARCH_AARCH64 && HAVE_SME
182  if (cpu_flags_raw & AV_CPU_FLAG_SME)
183  printf("sme_vector_length = %d\n", 8 * ff_aarch64_sme_length());
184 #endif
185 #if ARCH_RISCV && HAVE_RVV
186  if (cpu_flags_raw & AV_CPU_FLAG_RVV_I32) {
187  size_t bytes = ff_get_rv_vlenb();
188 
189  printf("rv_vlenb = %zu (%zu bits)\n", bytes, 8 * bytes);
190  }
191 #endif
192 
193  return 0;
194 }
flags
const SwsFlags flags[]
Definition: swscale.c:61
AV_CPU_FLAG_VFP
#define AV_CPU_FLAG_VFP
Definition: cpu.h:71
av_force_cpu_flags
void av_force_cpu_flags(int arg)
Disables cpu detection and forces the specified flags.
Definition: cpu.c:81
AV_CPU_FLAG_SSE3
#define AV_CPU_FLAG_SSE3
Prescott SSE3 functions.
Definition: cpu.h:41
printf
__device__ int printf(const char *,...)
cpu_count
static atomic_int cpu_count
Definition: cpu.c:57
AV_CPU_FLAG_RVB_BASIC
#define AV_CPU_FLAG_RVB_BASIC
Basic bit-manipulations.
Definition: cpu.h:101
AV_CPU_FLAG_LSX
#define AV_CPU_FLAG_LSX
Definition: cpu.h:88
AV_CPU_FLAG_SSE3SLOW
#define AV_CPU_FLAG_SSE3SLOW
SSE3 supported, but usually not faster.
Definition: cpu.h:42
AV_CPU_FLAG_RV_ZVBB
#define AV_CPU_FLAG_RV_ZVBB
Vector basic bit-manipulations.
Definition: cpu.h:105
AV_CPU_FLAG_SVE2
#define AV_CPU_FLAG_SVE2
Definition: cpu.h:79
AV_CPU_FLAG_3DNOW
#define AV_CPU_FLAG_3DNOW
AMD 3DNOW.
Definition: cpu.h:35
AV_CPU_FLAG_SVE
#define AV_CPU_FLAG_SVE
Definition: cpu.h:78
AV_CPU_FLAG_DOTPROD
#define AV_CPU_FLAG_DOTPROD
Definition: cpu.h:76
av_get_cpu_flags
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
Definition: cpu.c:109
AV_CPU_FLAG_BMI1
#define AV_CPU_FLAG_BMI1
Bit Manipulation Instruction Set 1.
Definition: cpu.h:58
cpu_flags
static atomic_int cpu_flags
Definition: cpu.c:56
AV_CPU_FLAG_RVV_F64
#define AV_CPU_FLAG_RVV_F64
Vectors of double's.
Definition: cpu.h:100
name
const char * name
Definition: cpu.c:41
AV_CPU_FLAG_RVB
#define AV_CPU_FLAG_RVB
B (bit manipulations)
Definition: cpu.h:107
AV_CPU_FLAG_SSSE3
#define AV_CPU_FLAG_SSSE3
Conroe SSSE3 functions.
Definition: cpu.h:44
AV_CPU_FLAG_XOP
#define AV_CPU_FLAG_XOP
Bulldozer XOP functions.
Definition: cpu.h:53
av_parse_cpu_caps
int av_parse_cpu_caps(unsigned *flags, const char *s)
Parse CPU caps from a string and update the given AV_CPU_* flags based on that.
Definition: cpu.c:119
AV_CPU_FLAG_3DNOWEXT
#define AV_CPU_FLAG_3DNOWEXT
AMD 3DNowExt.
Definition: cpu.h:40
type
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf type
Definition: writing_filters.txt:86
AV_CPU_FLAG_VSX
#define AV_CPU_FLAG_VSX
ISA 2.06.
Definition: cpu.h:65
AV_CPU_FLAG_RVV_F32
#define AV_CPU_FLAG_RVV_F32
Vectors of float's *‍/.
Definition: cpu.h:98
AV_CPU_FLAG_SLOW_GATHER
#define AV_CPU_FLAG_SLOW_GATHER
CPU has slow gathers.
Definition: cpu.h:62
AV_CPU_FLAG_AVX512
#define AV_CPU_FLAG_AVX512
AVX-512 functions: requires OS support even if YMM/ZMM registers aren't used.
Definition: cpu.h:60
cpu.h
AV_CPU_FLAG_ARMV6
#define AV_CPU_FLAG_ARMV6
Definition: cpu.h:69
AV_CPU_FLAG_SSE4
#define AV_CPU_FLAG_SSE4
Penryn SSE4.1 functions.
Definition: cpu.h:47
tmp
static uint8_t tmp[40]
Definition: aes_ctr.c:52
cpu_flag_tab
static const struct @522 cpu_flag_tab[]
print_cpu_flags
static void print_cpu_flags(int cpu_flags, const char *type)
Definition: cpu.c:116
flag
int flag
Definition: cpu.c:40
AV_CPU_FLAG_LASX
#define AV_CPU_FLAG_LASX
Definition: cpu.h:89
AV_CPU_FLAG_AVX512ICL
#define AV_CPU_FLAG_AVX512ICL
F/CD/BW/DQ/VL/VNNI/IFMA/VBMI/VBMI2/VPOPCNTDQ/BITALG/GFNI/VAES/VPCLMULQDQ.
Definition: cpu.h:61
AV_CPU_FLAG_MSA
#define AV_CPU_FLAG_MSA
Definition: cpu.h:85
AV_CPU_FLAG_CMOV
#define AV_CPU_FLAG_CMOV
supports cmov instruction
Definition: cpu.h:55
AV_CPU_FLAG_ALTIVEC
#define AV_CPU_FLAG_ALTIVEC
standard
Definition: cpu.h:64
c
Undefined Behavior In the C some operations are like signed integer dereferencing freed accessing outside allocated Undefined Behavior must not occur in a C it is not safe even if the output of undefined operations is unused The unsafety may seem nit picking but Optimizing compilers have in fact optimized code on the assumption that no undefined Behavior occurs Optimizing code based on wrong assumptions can and has in some cases lead to effects beyond the output of computations The signed integer overflow problem in speed critical code Code which is highly optimized and works with signed integers sometimes has the problem that often the output of the computation does not c
Definition: undefined.txt:32
AV_CPU_FLAG_I8MM
#define AV_CPU_FLAG_I8MM
Definition: cpu.h:77
av_cpu_count
int av_cpu_count(void)
Definition: cpu.c:224
AV_CPU_FLAG_SSE2
#define AV_CPU_FLAG_SSE2
PIV SSE2 functions.
Definition: cpu.h:37
AV_CPU_FLAG_CLMUL
#define AV_CPU_FLAG_CLMUL
Carry-less Multiplication instruction.
Definition: cpu.h:50
AV_CPU_FLAG_SETEND
#define AV_CPU_FLAG_SETEND
Definition: cpu.h:82
main
int main(int argc, char **argv)
Definition: cpu.c:129
AV_CPU_FLAG_AVXSLOW
#define AV_CPU_FLAG_AVXSLOW
AVX supported, but slow when using YMM registers (e.g. Bulldozer)
Definition: cpu.h:52
AV_CPU_FLAG_AVX
#define AV_CPU_FLAG_AVX
AVX functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:51
AV_CPU_FLAG_FMA4
#define AV_CPU_FLAG_FMA4
Bulldozer FMA4 functions.
Definition: cpu.h:54
cpu.h
AV_CPU_FLAG_AVX2
#define AV_CPU_FLAG_AVX2
AVX2 functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:56
AV_CPU_FLAG_ARM_CRC
#define AV_CPU_FLAG_ARM_CRC
Definition: cpu.h:81
AV_CPU_FLAG_SSE2SLOW
#define AV_CPU_FLAG_SSE2SLOW
SSE2 supported, but usually not faster.
Definition: cpu.h:38
AV_CPU_FLAG_NEON
#define AV_CPU_FLAG_NEON
Definition: cpu.h:73
AV_CPU_FLAG_FMA3
#define AV_CPU_FLAG_FMA3
Haswell FMA3 functions.
Definition: cpu.h:57
AV_CPU_FLAG_RV_MISALIGNED
#define AV_CPU_FLAG_RV_MISALIGNED
Fast misaligned accesses.
Definition: cpu.h:106
i
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:256
AV_CPU_FLAG_SIMD128
#define AV_CPU_FLAG_SIMD128
Definition: cpu.h:110
AV_CPU_FLAG_SSE42
#define AV_CPU_FLAG_SSE42
Nehalem SSE4.2 functions.
Definition: cpu.h:48
AV_CPU_FLAG_RVV_I32
#define AV_CPU_FLAG_RVV_I32
Vectors of 8/16/32-bit int's *‍/.
Definition: cpu.h:97
AV_CPU_FLAG_ARMV8
#define AV_CPU_FLAG_ARMV8
Definition: cpu.h:74
AV_CPU_FLAG_ATOM
#define AV_CPU_FLAG_ATOM
Atom processor, some SSSE3 instructions are slower.
Definition: cpu.h:46
AV_CPU_FLAG_VFPV3
#define AV_CPU_FLAG_VFPV3
Definition: cpu.h:72
getopt.c
AV_CPU_FLAG_ARMV5TE
#define AV_CPU_FLAG_ARMV5TE
Definition: cpu.h:68
AV_CPU_FLAG_MMX
#define AV_CPU_FLAG_MMX
standard MMX
Definition: cpu.h:32
AV_CPU_FLAG_RVI
#define AV_CPU_FLAG_RVI
I (full GPR bank)
Definition: cpu.h:92
AV_CPU_FLAG_AESNI
#define AV_CPU_FLAG_AESNI
Advanced Encryption Standard functions.
Definition: cpu.h:49
AV_CPU_FLAG_POWER8
#define AV_CPU_FLAG_POWER8
ISA 2.07.
Definition: cpu.h:66
AV_CPU_FLAG_SME
#define AV_CPU_FLAG_SME
Definition: cpu.h:80
AV_CPU_FLAG_SSE
#define AV_CPU_FLAG_SSE
SSE functions.
Definition: cpu.h:36
AV_CPU_FLAG_MMXEXT
#define AV_CPU_FLAG_MMXEXT
SSE integer functions or AMD MMX ext.
Definition: cpu.h:33
optarg
static char * optarg
Definition: getopt.c:39
AV_CPU_FLAG_BMI2
#define AV_CPU_FLAG_BMI2
Bit Manipulation Instruction Set 2.
Definition: cpu.h:59
AV_CPU_FLAG_VFP_VM
#define AV_CPU_FLAG_VFP_VM
VFPv2 vector mode, deprecated in ARMv7-A and unavailable in various CPUs implementations.
Definition: cpu.h:75
AV_CPU_FLAG_MMI
#define AV_CPU_FLAG_MMI
Definition: cpu.h:84
getopt
static int getopt(int argc, char *argv[], const char *opts)
Definition: getopt.c:41
avstring.h
AV_CPU_FLAG_RVV_I64
#define AV_CPU_FLAG_RVV_I64
Vectors of 64-bit int's *‍/.
Definition: cpu.h:99
cpu.h
AV_CPU_FLAG_ARMV6T2
#define AV_CPU_FLAG_ARMV6T2
Definition: cpu.h:70